P80C51FA-24
vs
P87C54-2
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
INTEL CORP
INTEL CORP
Part Package Code
DIP
DIP
Package Description
DIP, DIP40,.6
DIP, DIP40,.6
Pin Count
40
40
Reach Compliance Code
unknown
compliant
HTS Code
8542.31.00.01
8542.31.00.01
Has ADC
NO
NO
Address Bus Width
16
16
Bit Size
8
8
Boundary Scan
NO
NO
CPU Family
8051
8051
Clock Frequency-Max
24 MHz
12 MHz
DAC Channels
NO
NO
DMA Channels
NO
NO
External Data Bus Width
8
8
JESD-30 Code
R-PDIP-T40
R-PDIP-T40
Length
52.26 mm
52.26 mm
Number of I/O Lines
32
32
Number of Terminals
40
40
Operating Temperature-Max
70 °C
70 °C
Operating Temperature-Min
PWM Channels
YES
NO
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
DIP
DIP
Package Equivalence Code
DIP40,.6
DIP40,.6
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Qualification Status
Not Qualified
Not Qualified
RAM (bytes)
256
256
ROM (words)
0
16384
ROM Programmability
ROM LESS
OTPROM
Seated Height-Max
5.08 mm
5.08 mm
Speed
24 MHz
12 MHz
Supply Current-Max
56 mA
30 mA
Supply Voltage-Max
6 V
6 V
Supply Voltage-Min
4 V
5 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
COMMERCIAL
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
15.24 mm
15.24 mm
uPs/uCs/Peripheral ICs Type
MICROCONTROLLER
MICROCONTROLLER
Base Number Matches
1
1
Rohs Code
Additional Feature
BOOLEAN PROCESSOR; ON-CIRCUIT EMULATION
Format
FIXED POINT
Integrated Cache
NO
JESD-609 Code
e0
Low Power Mode
YES
Number of DMA Channels
Number of External Interrupts
2
Number of Serial I/Os
1
Number of Timers
3
On Chip Data RAM Width
8
On Chip Program ROM Width
8
RAM (words)
256
Terminal Finish
TIN LEAD
Compare P80C51FA-24 with alternatives
Compare P87C54-2 with alternatives