P54FCT543ADM
vs
5962-8973001LA
feature comparison
All Stats
Differences Only
Rohs Code
No
No
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
PERFORMANCE SEMICONDUCTOR CORP
INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code
DIP
CDIP
Package Description
DIP, DIP24,.3
DIP, DIP24,.3
Pin Count
24
24
Reach Compliance Code
unknown
not_compliant
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
MASTER CONTROL FOR LATCH AND OUTPUT ENABLES IN EACH DIRECTION
MASTER CONTROL FOR LATCH AND OUTPUT ENABLES IN EACH DIRECTION
Control Type
INDEPENDENT CONTROL
INDEPENDENT CONTROL
Count Direction
BIDIRECTIONAL
BIDIRECTIONAL
Family
FCT
FCT
JESD-30 Code
R-GDIP-T24
R-GDIP-T24
JESD-609 Code
e0
e0
Length
31.75 mm
32.004 mm
Logic IC Type
REGISTERED BUS TRANSCEIVER
REGISTERED BUS TRANSCEIVER
Max I(ol)
0.048 A
0.048 A
Number of Bits
8
8
Number of Functions
1
1
Number of Ports
2
2
Number of Terminals
24
24
Operating Temperature-Max
125 °C
125 °C
Operating Temperature-Min
-55 °C
-55 °C
Output Characteristics
3-STATE
3-STATE
Output Polarity
TRUE
TRUE
Package Body Material
CERAMIC, GLASS-SEALED
CERAMIC, GLASS-SEALED
Package Code
DIP
DIP
Package Equivalence Code
DIP24,.3
DIP24,.3
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Prop. Delay@Nom-Sup
7.5 ns
10 ns
Propagation Delay (tpd)
9 ns
14 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
5.08 mm
5.08 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
MILITARY
MILITARY
Terminal Finish
TIN LEAD
TIN LEAD
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
7.62 mm
7.62 mm
Base Number Matches
1
4
Pbfree Code
No
Manufacturer Package Code
SD24
Load Capacitance (CL)
50 pF
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
240
Screening Level
38535Q/M;38534H;883B
Compare P54FCT543ADM with alternatives
Compare 5962-8973001LA with alternatives