N74LVC32APWDH-T
vs
74LVC32APW-Q100/CJ
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Active
Ihs Manufacturer
NXP SEMICONDUCTORS
NEXPERIA
Package Description
TSSOP,
Reach Compliance Code
unknown
compliant
HTS Code
8542.39.00.01
Family
LVC/LCX/Z
JESD-30 Code
R-PDSO-G14
Length
5 mm
Load Capacitance (CL)
50 pF
Logic IC Type
OR GATE
OR GATE
Number of Functions
4
Number of Inputs
2
Number of Terminals
14
Operating Temperature-Max
85 °C
Operating Temperature-Min
-40 °C
Package Body Material
PLASTIC/EPOXY
Package Code
TSSOP
Package Shape
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd)
5 ns
Qualification Status
Not Qualified
Seated Height-Max
1.1 mm
Supply Voltage-Max (Vsup)
3.6 V
Supply Voltage-Min (Vsup)
1.2 V
Supply Voltage-Nom (Vsup)
3.3 V
Surface Mount
YES
Technology
CMOS
Temperature Grade
INDUSTRIAL
Terminal Form
GULL WING
Terminal Pitch
0.65 mm
Terminal Position
DUAL
Width
4.4 mm
Base Number Matches
1
1
Part Package Code
TSSOP
Pin Count
14
Manufacturer Package Code
SOT402-1
JESD-609 Code
e4
Moisture Sensitivity Level
1
Peak Reflow Temperature (Cel)
260
Screening Level
AEC-Q100
Terminal Finish
NICKEL PALLADIUM GOLD SILVER
Time@Peak Reflow Temperature-Max (s)
30
Compare N74LVC32APWDH-T with alternatives
Compare 74LVC32APW-Q100/CJ with alternatives