MC74LVX32DTR2 vs 74LVC32APW-Q100/CU feature comparison

MC74LVX32DTR2 Motorola Semiconductor Products

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74LVC32APW-Q100/CU Nexperia

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Rohs Code No Yes
Part Life Cycle Code Transferred Active
Ihs Manufacturer MOTOROLA INC NEXPERIA
Package Description TSSOP, TSSOP14,.25
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14
JESD-609 Code e0 e4
Length 5 mm
Load Capacitance (CL) 50 pF
Logic IC Type OR GATE OR GATE
Max I(ol) 0.004 A
Number of Functions 4
Number of Inputs 2
Number of Terminals 14
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Package Body Material PLASTIC/EPOXY
Package Code TSSOP
Package Equivalence Code TSSOP14,.25
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Packing Method TR
Prop. Delay@Nom-Sup 11.5 ns
Propagation Delay (tpd) 17 ns
Qualification Status Not Qualified
Schmitt Trigger NO
Seated Height-Max 1.2 mm
Supply Voltage-Max (Vsup) 3.6 V
Supply Voltage-Min (Vsup) 2 V
Supply Voltage-Nom (Vsup) 3.3 V
Surface Mount YES
Technology CMOS
Temperature Grade INDUSTRIAL
Terminal Finish Tin/Lead (Sn/Pb) NICKEL PALLADIUM GOLD SILVER
Terminal Form GULL WING
Terminal Pitch 0.65 mm
Terminal Position DUAL
Width 4.4 mm
Base Number Matches 4 1
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) 260
Screening Level AEC-Q100
Time@Peak Reflow Temperature-Max (s) 30

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