MB84256A-10PSK vs 71256L100TDB feature comparison

MB84256A-10PSK FUJITSU Limited

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71256L100TDB Integrated Device Technology Inc

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer FUJITSU SEMICONDUCTOR AMERICA INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code DIP CDIP
Package Description DIP, 0.300 INCH, CERAMIC, DIP-28
Pin Count 28 28
Reach Compliance Code unknown not_compliant
Access Time-Max 100 ns 100 ns
JESD-30 Code R-PDIP-T28 R-GDIP-T28
Length 35.36 mm 37.1475 mm
Memory Density 262144 bit 262144 bit
Memory IC Type STANDARD SRAM STANDARD SRAM
Memory Width 8 8
Number of Functions 1 1
Number of Ports 1
Number of Terminals 28 28
Number of Words 32768 words 32768 words
Number of Words Code 32000 32000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -55 °C
Organization 32KX8 32KX8
Output Enable YES
Package Body Material PLASTIC/EPOXY CERAMIC, GLASS-SEALED
Package Code DIP DIP
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL PARALLEL
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.25 mm 5.08 mm
Standby Voltage-Min 2 V 2 V
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL MILITARY
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 2
Pbfree Code No
Rohs Code No
Manufacturer Package Code SD28
ECCN Code 3A001.A.2.C
HTS Code 8542.32.00.41
Date Of Intro 1988-01-01
I/O Type COMMON
JESD-609 Code e0
Moisture Sensitivity Level 1
Output Characteristics 3-STATE
Package Equivalence Code DIP28,.3
Peak Reflow Temperature (Cel) 240
Screening Level MIL-STD-883 Class B
Standby Current-Max 0.0005 A
Supply Current-Max 0.115 mA
Terminal Finish TIN LEAD

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Compare 71256L100TDB with alternatives