MACHLV210-18JI vs CY7C346-30RMB feature comparison

MACHLV210-18JI Lattice Semiconductor Corporation

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CY7C346-30RMB Cypress Semiconductor

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer LATTICE SEMICONDUCTOR CORP CYPRESS SEMICONDUCTOR CORP
Part Package Code LCC PGA
Package Description PLASTIC, LCC-44 WINDOWED, CERAMIC, PGA-100
Pin Count 44 100
Reach Compliance Code unknown not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature NO LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
Clock Frequency-Max 38 MHz 27.7 MHz
In-System Programmable NO NO
JESD-30 Code S-PQCC-J44 S-CPGA-P100
JESD-609 Code e0 e0
JTAG BST NO NO
Length 16.5862 mm 33.3375 mm
Moisture Sensitivity Level 3
Number of Dedicated Inputs 4 19
Number of I/O Lines 32 64
Number of Macro Cells 64 128
Number of Terminals 44 100
Operating Temperature-Max 85 °C 125 °C
Operating Temperature-Min -40 °C -55 °C
Organization 4 DEDICATED INPUTS, 32 I/O 19 DEDICATED INPUTS, 64 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY CERAMIC, METAL-SEALED COFIRED
Package Code QCCJ WPGA
Package Equivalence Code LDCC44,.7SQ PGA100M,13X13
Package Shape SQUARE SQUARE
Package Style CHIP CARRIER GRID ARRAY, WINDOW
Peak Reflow Temperature (Cel) 225
Programmable Logic Type EE PLD UV PLD
Propagation Delay 18 ns 59 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.57 mm 5.715 mm
Supply Voltage-Max 3.6 V 5.5 V
Supply Voltage-Min 3 V 4.5 V
Supply Voltage-Nom 3.3 V 5 V
Surface Mount YES NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL MILITARY
Terminal Finish TIN LEAD TIN LEAD
Terminal Form J BEND PIN/PEG
Terminal Pitch 1.27 mm 2.54 mm
Terminal Position QUAD PERPENDICULAR
Time@Peak Reflow Temperature-Max (s) 30
Width 16.5862 mm 33.3375 mm
Base Number Matches 1 1
ECCN Code 3A001.A.2.C
Screening Level 38535Q/M;38534H;883B

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