M4A3-64/32-65JC
vs
CY7C346-25RC
feature comparison
Rohs Code |
No
|
No
|
Part Life Cycle Code |
Obsolete
|
Obsolete
|
Ihs Manufacturer |
VANTIS CORP
|
CYPRESS SEMICONDUCTOR CORP
|
Reach Compliance Code |
unknown
|
not_compliant
|
Additional Feature |
64 MACROCELLS; 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK; PROGRAMMABLE POLARITY
|
LABS INTERCONNECTED BY PIA; 8 LABS; 128 MACROCELLS; 1 EXTERNAL CLOCK; SHARED INPUT/CLOCK
|
Clock Frequency-Max |
95.2 MHz
|
34.5 MHz
|
In-System Programmable |
YES
|
NO
|
JESD-30 Code |
S-PQCC-J44
|
S-CPGA-P100
|
JESD-609 Code |
e0
|
e0
|
JTAG BST |
YES
|
NO
|
Number of Dedicated Inputs |
|
19
|
Number of I/O Lines |
32
|
64
|
Number of Macro Cells |
64
|
128
|
Number of Terminals |
44
|
100
|
Operating Temperature-Max |
70 °C
|
70 °C
|
Operating Temperature-Min |
|
|
Organization |
0 DEDICATED INPUTS, 32 I/O
|
19 DEDICATED INPUTS, 64 I/O
|
Output Function |
MACROCELL
|
MACROCELL
|
Package Body Material |
PLASTIC/EPOXY
|
CERAMIC, METAL-SEALED COFIRED
|
Package Code |
QCCJ
|
WPGA
|
Package Equivalence Code |
LDCC44,.7SQ
|
PGA100M,13X13
|
Package Shape |
SQUARE
|
SQUARE
|
Package Style |
CHIP CARRIER
|
GRID ARRAY, WINDOW
|
Programmable Logic Type |
EE PLD
|
UV PLD
|
Propagation Delay |
6.5 ns
|
52 ns
|
Qualification Status |
Not Qualified
|
Not Qualified
|
Supply Voltage-Max |
3.6 V
|
5.25 V
|
Supply Voltage-Min |
3 V
|
4.75 V
|
Supply Voltage-Nom |
3.3 V
|
5 V
|
Surface Mount |
YES
|
NO
|
Technology |
CMOS
|
CMOS
|
Temperature Grade |
COMMERCIAL
|
COMMERCIAL
|
Terminal Finish |
TIN LEAD
|
TIN LEAD
|
Terminal Form |
J BEND
|
PIN/PEG
|
Terminal Pitch |
1.27 mm
|
2.54 mm
|
Terminal Position |
QUAD
|
PERPENDICULAR
|
Base Number Matches |
2
|
1
|
Part Package Code |
|
PGA
|
Package Description |
|
WINDOWED, CERAMIC, PGA-100
|
Pin Count |
|
100
|
HTS Code |
|
8542.39.00.01
|
Length |
|
33.3375 mm
|
Seated Height-Max |
|
5.715 mm
|
Width |
|
33.3375 mm
|
|
|
|
Compare M4A3-64/32-65JC with alternatives
Compare CY7C346-25RC with alternatives