LFE2-50E-6F672C
vs
LFE2-50E-5F672C
feature comparison
Pbfree Code |
No
|
No
|
Rohs Code |
No
|
No
|
Part Life Cycle Code |
Obsolete
|
Obsolete
|
Ihs Manufacturer |
LATTICE SEMICONDUCTOR CORP
|
LATTICE SEMICONDUCTOR CORP
|
Part Package Code |
BGA
|
BGA
|
Package Description |
FPBGA-672
|
FPBGA-672
|
Pin Count |
672
|
672
|
Reach Compliance Code |
compliant
|
compliant
|
ECCN Code |
3A991.D
|
3A991.D
|
HTS Code |
8542.39.00.01
|
8542.39.00.01
|
Clock Frequency-Max |
357 MHz
|
311 MHz
|
Combinatorial Delay of a CLB-Max |
0.331 ns
|
0.358 ns
|
JESD-30 Code |
S-PBGA-B672
|
S-PBGA-B672
|
JESD-609 Code |
e0
|
e0
|
Length |
27 mm
|
27 mm
|
Moisture Sensitivity Level |
3
|
3
|
Number of Inputs |
500
|
500
|
Number of Logic Cells |
50000
|
50000
|
Number of Outputs |
500
|
500
|
Number of Terminals |
672
|
672
|
Operating Temperature-Max |
85 °C
|
85 °C
|
Operating Temperature-Min |
|
|
Organization |
6000 CLBS
|
6000 CLBS
|
Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
Package Code |
BGA
|
BGA
|
Package Equivalence Code |
BGA672,26X26,40
|
BGA672,26X26,40
|
Package Shape |
SQUARE
|
SQUARE
|
Package Style |
GRID ARRAY
|
GRID ARRAY
|
Peak Reflow Temperature (Cel) |
225
|
225
|
Programmable Logic Type |
FIELD PROGRAMMABLE GATE ARRAY
|
FIELD PROGRAMMABLE GATE ARRAY
|
Qualification Status |
Not Qualified
|
Not Qualified
|
Seated Height-Max |
2.6 mm
|
2.6 mm
|
Supply Voltage-Max |
1.26 V
|
1.26 V
|
Supply Voltage-Min |
1.14 V
|
1.14 V
|
Supply Voltage-Nom |
1.2 V
|
1.2 V
|
Surface Mount |
YES
|
YES
|
Technology |
CMOS
|
CMOS
|
Temperature Grade |
OTHER
|
OTHER
|
Terminal Finish |
TIN LEAD
|
TIN LEAD
|
Terminal Form |
BALL
|
BALL
|
Terminal Pitch |
1 mm
|
1 mm
|
Terminal Position |
BOTTOM
|
BOTTOM
|
Time@Peak Reflow Temperature-Max (s) |
30
|
30
|
Width |
27 mm
|
27 mm
|
Base Number Matches |
1
|
1
|
|
|
|
Compare LFE2-50E-6F672C with alternatives
Compare LFE2-50E-5F672C with alternatives