J80C32U-40 vs MX10C80500PC feature comparison

J80C32U-40 Matra MHS

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MX10C80500PC Macronix International Co Ltd

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer MATRA MHS MACRONIX INTERNATIONAL CO LTD
Reach Compliance Code unknown unknown
ECCN Code 3A991.A.2 3A991.A.2
HTS Code 8542.31.00.01 8542.31.00.01
Has ADC NO NO
Additional Feature BOOLEAN PROCESSOR
Address Bus Width 16 16
Bit Size 8 8
Boundary Scan NO
Clock Frequency-Max 40 MHz 40 MHz
DAC Channels NO NO
DMA Channels NO NO
External Data Bus Width 8 8
Format FIXED POINT
Integrated Cache NO
JESD-30 Code S-CQCC-J44 R-PDIP-T40
Low Power Mode YES
Number of DMA Channels
Number of External Interrupts 2
Number of I/O Lines 32 32
Number of Serial I/Os 1
Number of Terminals 44 40
Number of Timers 3
On Chip Data RAM Width 8
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
PWM Channels NO NO
Package Body Material CERAMIC, METAL-SEALED COFIRED PLASTIC/EPOXY
Package Code QCCJ DIP
Package Shape SQUARE RECTANGULAR
Package Style CHIP CARRIER IN-LINE
Qualification Status Not Qualified Not Qualified
RAM (words) 256
ROM (words) 0 65536
ROM Programmability ROM LESS MROM
Speed 40 MHz 40 MHz
Supply Current-Max 59 mA 60 mA
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 4.5 V 5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount YES NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Form J BEND THROUGH-HOLE
Terminal Position QUAD DUAL
uPs/uCs/Peripheral ICs Type MICROCONTROLLER MICROCONTROLLER
Base Number Matches 1 1
Part Package Code DIP
Package Description DIP, DIP40,.6
Pin Count 40
CPU Family 8051
JESD-609 Code e0
On Chip Program ROM Width 8
Package Equivalence Code DIP40,.6
RAM (bytes) 256
Terminal Finish TIN LEAD
Terminal Pitch 2.54 mm

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Compare MX10C80500PC with alternatives