IDT74LVCH16541APF8
vs
IDT74LVC16374APFG8
feature comparison
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
INTEGRATED DEVICE TECHNOLOGY INC
|
INTEGRATED DEVICE TECHNOLOGY INC
|
| Part Package Code |
SOIC
|
SOIC
|
| Package Description |
TSSOP,
|
TSSOP, TSSOP48,.25,16
|
| Pin Count |
48
|
48
|
| Reach Compliance Code |
unknown
|
unknown
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Additional Feature |
WITH DUAL OUTPUT ENABLE
|
5V TOLERANT INPUTS AND OUTPUTS
|
| Family |
LVC/LCX/Z
|
LVC/LCX/Z
|
| JESD-30 Code |
R-PDSO-G48
|
R-PDSO-G48
|
| JESD-609 Code |
e0
|
e3
|
| Length |
9.7 mm
|
9.7 mm
|
| Logic IC Type |
BUS DRIVER
|
BUS DRIVER
|
| Number of Bits |
8
|
8
|
| Number of Functions |
2
|
2
|
| Number of Ports |
2
|
2
|
| Number of Terminals |
48
|
48
|
| Operating Temperature-Max |
85 °C
|
85 °C
|
| Operating Temperature-Min |
-40 °C
|
-40 °C
|
| Output Characteristics |
3-STATE
|
3-STATE
|
| Output Polarity |
TRUE
|
TRUE
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
TSSOP
|
TSSOP
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
|
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
|
| Propagation Delay (tpd) |
5 ns
|
4.9 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
1.2 mm
|
1.2 mm
|
| Supply Voltage-Max (Vsup) |
3.6 V
|
3.6 V
|
| Supply Voltage-Min (Vsup) |
2.7 V
|
2.7 V
|
| Supply Voltage-Nom (Vsup) |
3.3 V
|
3.3 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
INDUSTRIAL
|
INDUSTRIAL
|
| Terminal Finish |
TIN LEAD
|
MATTE TIN
|
| Terminal Form |
GULL WING
|
GULL WING
|
| Terminal Pitch |
0.4 mm
|
0.4 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Width |
4.4 mm
|
4.4 mm
|
| Base Number Matches |
1
|
1
|
| Pbfree Code |
|
Yes
|
| Rohs Code |
|
Yes
|
| Load Capacitance (CL) |
|
50 pF
|
| Max Frequency@Nom-Sup |
|
150000000 Hz
|
| Max I(ol) |
|
0.024 A
|
| Moisture Sensitivity Level |
|
1
|
| Package Equivalence Code |
|
TSSOP48,.25,16
|
| Packing Method |
|
TR
|
| Peak Reflow Temperature (Cel) |
|
260
|
| Prop. Delay@Nom-Sup |
|
4.5 ns
|
| Time@Peak Reflow Temperature-Max (s) |
|
40
|
| Trigger Type |
|
POSITIVE EDGE
|
|
|
|
Compare IDT74LVCH16541APF8 with alternatives
Compare IDT74LVC16374APFG8 with alternatives