IDT74LVC540APY8 vs SN74LVC540ADBLE feature comparison

IDT74LVC540APY8 Integrated Device Technology Inc

Buy Now Datasheet

SN74LVC540ADBLE Texas Instruments

Buy Now Datasheet
Pbfree Code No No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC TEXAS INSTRUMENTS INC
Part Package Code SSOP SSOP
Package Description SSOP, SSOP, SSOP20,.3
Pin Count 20 20
Reach Compliance Code compliant not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature WITH DUAL OUTPUT ENABLE WITH DUAL OUTPUT ENABLE
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G20 R-PDSO-G20
JESD-609 Code e0
Length 7.2 mm 7.2 mm
Logic IC Type BUS DRIVER BUS DRIVER
Moisture Sensitivity Level 1
Number of Bits 8 8
Number of Functions 1 1
Number of Ports 2 2
Number of Terminals 20 20
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SSOP SSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Propagation Delay (tpd) 7.1 ns 16.4 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 2 mm 2 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2.3 V 1.65 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Finish TIN LEAD
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Width 5.3 mm 5.3 mm
Base Number Matches 1 1
Control Type ENABLE LOW
Load Capacitance (CL) 50 pF
Max I(ol) 0.024 A
Package Equivalence Code SSOP20,.3
Packing Method TR
Peak Reflow Temperature (Cel) NOT SPECIFIED
Prop. Delay@Nom-Sup 5.3 ns
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED

Compare IDT74LVC540APY8 with alternatives

Compare SN74LVC540ADBLE with alternatives