IDT74LVC10APG8 vs 74LVC10APW,112 feature comparison

IDT74LVC10APG8 Integrated Device Technology Inc

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74LVC10APW,112 NXP Semiconductors

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Pbfree Code No
Rohs Code No Yes
Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC NXP SEMICONDUCTORS
Part Package Code TSSOP TSSOP
Package Description TSSOP, 4.40 MM, PLASTIC, MO-153, SOT402-1, TSSOP-14
Pin Count 14 14
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G14 R-PDSO-G14
JESD-609 Code e0 e4
Length 5 mm 5 mm
Logic IC Type NAND GATE NAND GATE
Number of Functions 3 3
Number of Inputs 3 3
Number of Terminals 14 14
Operating Temperature-Max 85 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd) 5.8 ns 12.9 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.2 mm 1.1 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2.3 V 1.2 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL AUTOMOTIVE
Terminal Finish TIN LEAD Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Width 4.4 mm 4.4 mm
Base Number Matches 1 2
Manufacturer Package Code SOT402-1
Factory Lead Time 4 Weeks
Load Capacitance (CL) 50 pF
Max I(ol) 0.024 A
Moisture Sensitivity Level 1
Package Equivalence Code TSSOP14,.25
Packing Method TUBE
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 5.7 ns
Schmitt Trigger NO
Time@Peak Reflow Temperature-Max (s) 30

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