IDT72104L120DB vs 72104L35P feature comparison

IDT72104L120DB Integrated Device Technology Inc

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72104L35P Integrated Device Technology Inc

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Pbfree Code No No
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code DIP PDIP
Package Description 0.600 INCH, CERDIP-40 DIP, DIP40,.6
Pin Count 40 40
Reach Compliance Code not_compliant not_compliant
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.71 8542.32.00.71
Access Time-Max 120 ns 35 ns
Additional Feature RETRANSMIT
Clock Frequency-Max (fCLK) 7 MHz 22.2 MHz
Cycle Time 140 ns 45 ns
JESD-30 Code R-GDIP-T40 R-PDIP-T40
JESD-609 Code e0 e0
Length 51.943 mm
Memory Density 36864 bit 36864 bit
Memory IC Type OTHER FIFO OTHER FIFO
Memory Width 9 9
Number of Functions 1 1
Number of Terminals 40 40
Number of Words 4096 words 4096 words
Number of Words Code 4000 4000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 125 °C 70 °C
Operating Temperature-Min -55 °C
Organization 4KX9 4KX9
Output Characteristics 3-STATE
Output Enable YES YES
Package Body Material CERAMIC, GLASS-SEALED PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP40,.6 DIP40,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL/SERIAL PARALLEL
Qualification Status Not Qualified Not Qualified
Screening Level 38535Q/M;38534H;883B
Seated Height-Max 5.588 mm
Standby Current-Max 0.004 A 0.002 A
Supply Current-Max 0.16 mA 0.14 mA
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY COMMERCIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm
Base Number Matches 1 2
Manufacturer Package Code PD40
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) 245

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