IDT7202LA25PDGI vs CY7C424-25DC feature comparison

IDT7202LA25PDGI Integrated Device Technology Inc

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CY7C424-25DC Cypress Semiconductor

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Pbfree Code Yes
Rohs Code Yes No
Part Life Cycle Code Transferred Obsolete
Ihs Manufacturer INTEGRATED DEVICE TECHNOLOGY INC CYPRESS SEMICONDUCTOR CORP
Part Package Code DIP DIP
Package Description DIP, DIP28,.6 0.600 INCH, CERDIP-28
Pin Count 28 28
Reach Compliance Code compliant not_compliant
ECCN Code EAR99 EAR99
HTS Code 8542.32.00.71 8542.32.00.71
Access Time-Max 25 ns 25 ns
Additional Feature RETRANSMIT RETRANSMIT
Clock Frequency-Max (fCLK) 28.5 MHz 28.5 MHz
Cycle Time 35 ns 35 ns
JESD-30 Code R-PDIP-T28 R-GDIP-T28
JESD-609 Code e3 e0
Length 36.576 mm 37.338 mm
Memory Density 9216 bit 9216 bit
Memory IC Type OTHER FIFO OTHER FIFO
Memory Width 9 9
Moisture Sensitivity Level 1
Number of Functions 1 1
Number of Terminals 28 28
Number of Words 1024 words 1024 words
Number of Words Code 1000 1000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 85 °C 70 °C
Operating Temperature-Min -40 °C
Organization 1KX9 1KX9
Output Enable NO NO
Package Body Material PLASTIC/EPOXY CERAMIC, GLASS-SEALED
Package Code DIP DIP
Package Equivalence Code DIP28,.6 DIP28,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL PARALLEL
Peak Reflow Temperature (Cel) 260
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.699 mm 5.715 mm
Standby Current-Max 0.005 A 0.02 A
Supply Current-Max 0.08 mA 0.132 mA
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 4.5 V 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL COMMERCIAL
Terminal Finish Matte Tin (Sn) - annealed TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 15.24 mm 15.24 mm
Base Number Matches 1 1
Output Characteristics 3-STATE

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