IDT7201LA50TPGB
vs
7201LA50TPB
feature comparison
All Stats
Differences Only
Pbfree Code
Rohs Code
Part Life Cycle Code
Transferred
Transferred
Ihs Manufacturer
INTEGRATED DEVICE TECHNOLOGY INC
INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code
DIP
DIP
Package Description
DIP,
DIP, DIP28,.3
Pin Count
28
28
Reach Compliance Code
compliant
not_compliant
ECCN Code
EAR99
EAR99
HTS Code
8542.32.00.71
8542.32.00.71
Access Time-Max
50 ns
50 ns
Additional Feature
RETRANSMIT
RETRANSMIT
Cycle Time
65 ns
65 ns
JESD-30 Code
R-PDIP-T28
R-PDIP-T28
JESD-609 Code
e3
e0
Length
34.671 mm
34.671 mm
Memory Density
4608 bit
4608 bit
Memory Width
9
9
Number of Functions
1
1
Number of Terminals
28
28
Number of Words
512 words
512 words
Number of Words Code
512
512
Operating Mode
ASYNCHRONOUS
ASYNCHRONOUS
Operating Temperature-Max
125 °C
125 °C
Operating Temperature-Min
-55 °C
-55 °C
Organization
512X9
512X9
Output Enable
NO
NO
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
DIP
DIP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Parallel/Serial
PARALLEL
PARALLEL
Qualification Status
Not Qualified
Not Qualified
Screening Level
MIL-STD-883 Class B
MIL-STD-883 Class B
Seated Height-Max
4.572 mm
4.572 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
MILITARY
MILITARY
Terminal Finish
MATTE TIN
TIN LEAD
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
7.62 mm
7.62 mm
Base Number Matches
1
2
Clock Frequency-Max (fCLK)
33.3 MHz
Memory IC Type
OTHER FIFO
Package Equivalence Code
DIP28,.3
Standby Current-Max
0.015 A
Supply Current-Max
0.1 mA
Compare IDT7201LA50TPGB with alternatives
Compare 7201LA50TPB with alternatives