HD74LVCZ240AFPEL vs TC74LCX240FELP feature comparison

HD74LVCZ240AFPEL Renesas Electronics Corporation

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TC74LCX240FELP Toshiba America Electronic Components

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Part Life Cycle Code Obsolete Active
Ihs Manufacturer RENESAS ELECTRONICS CORP TOSHIBA CORP
Part Package Code SOIC SOIC
Package Description SOP, SOP20,.3 SOP,
Pin Count 20 20
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01
Control Type ENABLE LOW
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G20 R-PDSO-G20
Length 12.6 mm 12.8 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type BUS DRIVER BUS DRIVER
Max I(ol) 0.024 A
Number of Bits 4 4
Number of Functions 2 2
Number of Ports 2 2
Number of Terminals 20 20
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Equivalence Code SOP20,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Packing Method TR
Prop. Delay@Nom-Sup 6.5 ns
Propagation Delay (tpd) 7.5 ns 6.5 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 2.2 mm 1.8 mm
Supply Voltage-Max (Vsup) 5.5 V 3.6 V
Supply Voltage-Min (Vsup) 2.7 V 2 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Width 5.5 mm 5.3 mm
Base Number Matches 1 1
Pbfree Code No
Rohs Code No
JESD-609 Code e0
Peak Reflow Temperature (Cel) 240
Terminal Finish TIN LEAD
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED

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