GAL22V10-20LP
vs
GAL22V10-20LNI
feature comparison
Rohs Code |
No
|
No
|
Part Life Cycle Code |
Obsolete
|
Obsolete
|
Ihs Manufacturer |
LATTICE SEMICONDUCTOR CORP
|
NATIONAL SEMICONDUCTOR CORP
|
Part Package Code |
DIP
|
|
Package Description |
SKINNY, PLASTIC, DIP-24
|
DIP, DIP24,.3
|
Pin Count |
24
|
|
Reach Compliance Code |
not_compliant
|
unknown
|
HTS Code |
8542.39.00.01
|
8542.39.00.01
|
Architecture |
PAL-TYPE
|
PAL-TYPE
|
Clock Frequency-Max |
40 MHz
|
34.5 MHz
|
JESD-30 Code |
R-PDIP-T24
|
R-PDIP-T24
|
JESD-609 Code |
e0
|
e0
|
Length |
31.75 mm
|
31.915 mm
|
Number of Dedicated Inputs |
11
|
11
|
Number of I/O Lines |
10
|
10
|
Number of Inputs |
22
|
22
|
Number of Outputs |
10
|
10
|
Number of Product Terms |
132
|
132
|
Number of Terminals |
24
|
24
|
Operating Temperature-Max |
75 °C
|
85 °C
|
Operating Temperature-Min |
|
-40 °C
|
Organization |
11 DEDICATED INPUTS, 10 I/O
|
11 DEDICATED INPUTS, 10 I/O
|
Output Function |
MACROCELL
|
MACROCELL
|
Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
Package Code |
DIP
|
DIP
|
Package Equivalence Code |
DIP24,.3
|
DIP24,.3
|
Package Shape |
RECTANGULAR
|
RECTANGULAR
|
Package Style |
IN-LINE
|
IN-LINE
|
Programmable Logic Type |
EE PLD
|
EE PLD
|
Propagation Delay |
20 ns
|
20 ns
|
Qualification Status |
Not Qualified
|
Not Qualified
|
Seated Height-Max |
5.08 mm
|
5.08 mm
|
Supply Voltage-Max |
5.25 V
|
5.5 V
|
Supply Voltage-Min |
4.75 V
|
4.5 V
|
Supply Voltage-Nom |
5 V
|
5 V
|
Surface Mount |
NO
|
NO
|
Technology |
CMOS
|
CMOS
|
Temperature Grade |
COMMERCIAL EXTENDED
|
INDUSTRIAL
|
Terminal Finish |
TIN LEAD
|
TIN LEAD
|
Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
Terminal Pitch |
2.54 mm
|
2.54 mm
|
Terminal Position |
DUAL
|
DUAL
|
Width |
7.62 mm
|
7.62 mm
|
Base Number Matches |
1
|
2
|
Additional Feature |
|
10 MACROCELLS; SHARED INPUT/CLOCK; REGISTER PRELOAD
|
|
|
|
Compare GAL22V10-20LP with alternatives
Compare GAL22V10-20LNI with alternatives