GAL22V10-15LPI vs GAL22V10B-15LP feature comparison

GAL22V10-15LPI Lattice Semiconductor Corporation

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GAL22V10B-15LP Lattice Semiconductor Corporation

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer LATTICE SEMICONDUCTOR CORP LATTICE SEMICONDUCTOR CORP
Part Package Code DIP DIP
Package Description SKINNY, PLASTIC, DIP-24 PLASTIC, DIP-24
Pin Count 24 24
Reach Compliance Code not_compliant not_compliant
HTS Code 8542.39.00.01 8542.39.00.01
Architecture PAL-TYPE PAL-TYPE
Clock Frequency-Max 50 MHz 55.5 MHz
JESD-30 Code R-PDIP-T24 R-PDIP-T24
JESD-609 Code e0 e0
Length 31.75 mm 31.877 mm
Number of Dedicated Inputs 11 11
Number of I/O Lines 10 10
Number of Inputs 22 22
Number of Outputs 10 10
Number of Product Terms 132 132
Number of Terminals 24 24
Operating Temperature-Max 85 °C 75 °C
Operating Temperature-Min -40 °C
Organization 11 DEDICATED INPUTS, 10 I/O 11 DEDICATED INPUTS, 10 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP DIP
Package Equivalence Code DIP24,.3 DIP24,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Programmable Logic Type EE PLD EE PLD
Propagation Delay 15 ns 15 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.08 mm 4.953 mm
Supply Voltage-Max 5.5 V 5.25 V
Supply Voltage-Min 4.5 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade INDUSTRIAL COMMERCIAL EXTENDED
Terminal Finish TIN LEAD TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 7.62 mm 7.62 mm
Base Number Matches 1 1
Additional Feature REGISTER PRELOAD; POWER-UP RESET
Moisture Sensitivity Level 1

Compare GAL22V10-15LPI with alternatives

Compare GAL22V10B-15LP with alternatives