GAL20V8-25QNC
vs
PALCE20V8H-25PC
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
NATIONAL SEMICONDUCTOR CORP
VANTIS CORP
Package Description
DIP, DIP24,.3
0.300 INCH, SKINNY, PLASTIC, DIP-24
Reach Compliance Code
unknown
unknown
HTS Code
8542.39.00.01
Additional Feature
8 MACROCELLS; SHARED INPUT/CLOCK; REGISTER PRELOAD
Architecture
PAL-TYPE
PAL-TYPE
Clock Frequency-Max
37 MHz
40 MHz
JESD-30 Code
R-PDIP-T24
R-PDIP-T24
JESD-609 Code
e0
e0
Length
31.915 mm
Number of Dedicated Inputs
12
14
Number of I/O Lines
8
8
Number of Inputs
20
20
Number of Outputs
8
8
Number of Product Terms
64
64
Number of Terminals
24
24
Operating Temperature-Max
75 °C
70 °C
Operating Temperature-Min
Organization
12 DEDICATED INPUTS, 8 I/O
14 DEDICATED INPUTS, 8 I/O
Output Function
MACROCELL
MACROCELL
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
DIP
DIP
Package Equivalence Code
DIP24,.3
DIP24,.3
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Programmable Logic Type
EE PLD
EE PLD
Propagation Delay
25 ns
25 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
5.08 mm
Supply Voltage-Max
5.25 V
Supply Voltage-Min
4.75 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL EXTENDED
COMMERCIAL
Terminal Finish
TIN LEAD
TIN LEAD
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
7.62 mm
Base Number Matches
3
3
Compare GAL20V8-25QNC with alternatives