GAL18V10-15LPB
vs
GAL18V10-20LD/883C
feature comparison
| Rohs Code |
No
|
No
|
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
LATTICE SEMICONDUCTOR CORP
|
LATTICE SEMICONDUCTOR CORP
|
| Part Package Code |
DIP
|
DIP
|
| Package Description |
SKINNY, PLASTIC, DIP-20
|
0.300 INCH, SKINNY, CERDIP-20
|
| Pin Count |
20
|
20
|
| Reach Compliance Code |
not_compliant
|
compliant
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| Architecture |
PAL-TYPE
|
PAL-TYPE
|
| Clock Frequency-Max |
50 MHz
|
31.2 MHz
|
| JESD-30 Code |
R-PDIP-T20
|
R-GDIP-T20
|
| JESD-609 Code |
e0
|
e0
|
| Number of Dedicated Inputs |
7
|
7
|
| Number of I/O Lines |
10
|
10
|
| Number of Inputs |
18
|
18
|
| Number of Outputs |
10
|
10
|
| Number of Product Terms |
96
|
96
|
| Number of Terminals |
20
|
20
|
| Operating Temperature-Max |
75 °C
|
125 °C
|
| Operating Temperature-Min |
|
-55 °C
|
| Organization |
7 DEDICATED INPUTS, 10 I/O
|
7 DEDICATED INPUTS, 10 I/O
|
| Output Function |
MACROCELL
|
MACROCELL
|
| Package Body Material |
PLASTIC/EPOXY
|
CERAMIC, GLASS-SEALED
|
| Package Code |
DIP
|
DIP
|
| Package Equivalence Code |
DIP20,.3
|
DIP20,.3
|
| Package Shape |
RECTANGULAR
|
RECTANGULAR
|
| Package Style |
IN-LINE
|
IN-LINE
|
| Programmable Logic Type |
EE PLD
|
EE PLD
|
| Propagation Delay |
15 ns
|
20 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
5.08 mm
|
5.08 mm
|
| Supply Voltage-Max |
5.25 V
|
5.5 V
|
| Supply Voltage-Min |
4.75 V
|
4.5 V
|
| Supply Voltage-Nom |
5 V
|
5 V
|
| Surface Mount |
NO
|
NO
|
| Technology |
CMOS
|
CMOS
|
| Temperature Grade |
COMMERCIAL EXTENDED
|
MILITARY
|
| Terminal Finish |
TIN LEAD
|
TIN LEAD
|
| Terminal Form |
THROUGH-HOLE
|
THROUGH-HOLE
|
| Terminal Pitch |
2.54 mm
|
2.54 mm
|
| Terminal Position |
DUAL
|
DUAL
|
| Width |
7.62 mm
|
7.62 mm
|
| Base Number Matches |
1
|
1
|
| ECCN Code |
|
3A001.A.2.C
|
| Screening Level |
|
38535Q/M;38534H;883B
|
|
|
|
Compare GAL18V10-15LPB with alternatives
Compare GAL18V10-20LD/883C with alternatives