GAL16V8D-25QPN
vs
PALCE16V8H-25PC
feature comparison
All Stats
Differences Only
Pbfree Code
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
LATTICE SEMICONDUCTOR CORP
ADVANCED MICRO DEVICES INC
Part Package Code
DIP
DIP
Package Description
LEAD FREE, PLASTIC, DIP-20
DIP, DIP20,.3
Pin Count
20
20
Reach Compliance Code
unknown
unknown
ECCN Code
EAR99
HTS Code
8542.39.00.01
8542.39.00.01
Samacsys Manufacturer
Lattice Semiconductor
Architecture
PAL-TYPE
PAL-TYPE
Clock Frequency-Max
37 MHz
37 MHz
JESD-30 Code
R-PDIP-T20
R-PDIP-T20
JESD-609 Code
e3
e0
Length
26.162 mm
26.035 mm
Number of Dedicated Inputs
8
8
Number of I/O Lines
8
8
Number of Inputs
18
18
Number of Outputs
8
8
Number of Product Terms
64
64
Number of Terminals
20
20
Operating Temperature-Max
70 °C
75 °C
Operating Temperature-Min
Organization
8 DEDICATED INPUTS, 8 I/O
8 DEDICATED INPUTS, 8 I/O
Output Function
MACROCELL
MACROCELL
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
DIP
DIP
Package Equivalence Code
DIP20,.3
DIP20,.3
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Peak Reflow Temperature (Cel)
260
Programmable Logic Type
EE PLD
EE PLD
Propagation Delay
25 ns
25 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
5.334 mm
5.08 mm
Supply Voltage-Max
5.25 V
5.25 V
Supply Voltage-Min
4.75 V
4.75 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
COMMERCIAL EXTENDED
Terminal Finish
MATTE TIN
TIN LEAD
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
7.62 mm
7.62 mm
Base Number Matches
2
2
Additional Feature
PROGRAMMABLE OUTPUT POLARITY; 8 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK
Compare GAL16V8D-25QPN with alternatives
Compare PALCE16V8H-25PC with alternatives