GAL16V8A-15LP
vs
PALCE16V8H-15PI
feature comparison
All Stats
Differences Only
Rohs Code
No
No
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
LATTICE SEMICONDUCTOR CORP
LATTICE SEMICONDUCTOR CORP
Part Package Code
DIP
Package Description
PLASTIC, DIP-20
DIP, DIP20,.3
Pin Count
20
Reach Compliance Code
not_compliant
not_compliant
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
8 MACROCELLS; 1 EXTERNAL CLOCK; REGISTER PRELOAD; SHARED INPUT/CLOCK
Architecture
PAL-TYPE
PAL-TYPE
Clock Frequency-Max
45.5 MHz
45.5 MHz
JESD-30 Code
R-PDIP-T20
R-PDIP-T20
JESD-609 Code
e0
e0
Length
26.125 mm
26.416 mm
Moisture Sensitivity Level
1
Number of Dedicated Inputs
8
8
Number of I/O Lines
8
8
Number of Inputs
18
18
Number of Outputs
8
8
Number of Product Terms
64
64
Number of Terminals
20
20
Operating Temperature-Max
75 °C
85 °C
Operating Temperature-Min
-40 °C
Organization
8 DEDICATED INPUTS, 8 I/O
8 DEDICATED INPUTS, 8 I/O
Output Function
MACROCELL
MACROCELL
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
DIP
DIP
Package Equivalence Code
DIP20,.3
DIP20,.3
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Programmable Logic Type
EE PLD
EE PLD
Propagation Delay
15 ns
15 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
4.57 mm
5.08 mm
Supply Voltage-Max
5.25 V
5.5 V
Supply Voltage-Min
4.75 V
4.5 V
Supply Voltage-Nom
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL EXTENDED
INDUSTRIAL
Terminal Finish
Tin/Lead (Sn/Pb)
Tin/Lead (Sn/Pb)
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
DUAL
DUAL
Width
7.62 mm
7.62 mm
Base Number Matches
1
3
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