FTS128K32N-35H1BA
vs
WS128K32N-35H1IA
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Active
Transferred
Ihs Manufacturer
FORCE TECHNOLOGIES LTD
WHITE ELECTRONIC DESIGNS CORP
Part Package Code
PGA
Package Description
PGA,
1.075 X 1.075 INCH, HERMETIC SEALED, CERAMIC, HIP-66
Pin Count
66
Reach Compliance Code
unknown
unknown
ECCN Code
3A001.A.2.C
HTS Code
8542.32.00.41
Access Time-Max
35 ns
35 ns
JESD-30 Code
S-CPGA-P66
S-CPGA-P66
Length
27.3 mm
27.3 mm
Memory Density
4194304 bit
4194304 bit
Memory IC Type
STANDARD SRAM
SRAM MODULE
Memory Width
32
32
Number of Functions
1
1
Number of Terminals
66
66
Number of Words
131072 words
131072 words
Number of Words Code
128000
128000
Operating Mode
ASYNCHRONOUS
ASYNCHRONOUS
Operating Temperature-Max
125 °C
85 °C
Operating Temperature-Min
-55 °C
-40 °C
Organization
128KX32
128KX32
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
PGA
PGA
Package Shape
SQUARE
SQUARE
Package Style
GRID ARRAY
GRID ARRAY
Parallel/Serial
PARALLEL
PARALLEL
Qualification Status
Not Qualified
Not Qualified
Screening Level
MIL-STD-883 Class B (Modified)
Seated Height-Max
4.6 mm
4.6 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
MILITARY
INDUSTRIAL
Terminal Form
PIN/PEG
PIN/PEG
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
PERPENDICULAR
PERPENDICULAR
Width
27.3 mm
27.3 mm
Base Number Matches
1
4
Rohs Code
No
Additional Feature
USER CONFIGURABLE AS 512K X 8
JESD-609 Code
e0
Terminal Finish
TIN LEAD
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