EPM7192EGC160-12
vs
5962-9316801MXX
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
INTEL CORP
ALTERA CORP
Package Description
PGA, PGA160M,15X15
PGA,
Reach Compliance Code
compliant
unknown
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
CONFIGURABLE I/O OPERATION WITH 3.3V OR 5V
192 MACROCELLS; CONFIGURABLE I/O OPERATION (3.3V OR 5V); 2 EXTERNAL CLOCKS; SHARED INPUT/CLOCK
Clock Frequency-Max
125 MHz
62.5 MHz
In-System Programmable
NO
JESD-30 Code
S-CPGA-P160
S-CPGA-P160
JESD-609 Code
e0
e4
JTAG BST
NO
Length
39.624 mm
39.624 mm
Moisture Sensitivity Level
1
Number of Dedicated Inputs
Number of I/O Lines
124
Number of Macro Cells
192
Number of Terminals
160
160
Operating Temperature-Max
70 °C
125 °C
Operating Temperature-Min
-55 °C
Organization
0 DEDICATED INPUTS, 124 I/O
0 DEDICATED INPUTS
Output Function
MACROCELL
MACROCELL
Package Body Material
CERAMIC, METAL-SEALED COFIRED
CERAMIC, METAL-SEALED COFIRED
Package Code
PGA
PGA
Package Equivalence Code
PGA160M,15X15
Package Shape
SQUARE
SQUARE
Package Style
GRID ARRAY
GRID ARRAY
Programmable Logic Type
EE PLD
EE PLD
Propagation Delay
12 ns
20 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
5.34 mm
5.34 mm
Supply Voltage-Max
5.25 V
2.625 V
Supply Voltage-Min
4.75 V
2.375 V
Supply Voltage-Nom
5 V
2.5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
MILITARY
Terminal Finish
TIN LEAD
GOLD
Terminal Form
PIN/PEG
PIN/PEG
Terminal Pitch
2.54 mm
2.54 mm
Terminal Position
PERPENDICULAR
PERPENDICULAR
Width
39.624 mm
39.624 mm
Base Number Matches
2
1
Part Package Code
PGA
Pin Count
160
ECCN Code
3A001.A.2.C
Screening Level
MIL-STD-883
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