EP910IPC40-25 vs EP910IDC-15 feature comparison

EP910IPC40-25 Altera Corporation

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EP910IDC-15 Rochester Electronics LLC

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Rohs Code No No
Part Life Cycle Code Obsolete Active
Ihs Manufacturer ALTERA CORP ROCHESTER ELECTRONICS LLC
Part Package Code DIP DIP
Package Description DIP, DIP40,.6 WINDOWED, CERDIP-40
Pin Count 40 40
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 24 MACROCELLS; 2 EXTERNAL CLOCKS MACROCELLS INTERCONNECTED BY GLOBAL BUS; 24 MACROCELLS; 2 EXTERNAL CLOCKS
Architecture PAL-TYPE
Clock Frequency-Max 62.5 MHz 66.6 MHz
JESD-30 Code R-PDIP-T40 R-GDIP-T40
JESD-609 Code e0 e0
Length 52.4256 mm
Number of Dedicated Inputs 12 12
Number of I/O Lines 24 24
Number of Inputs 36
Number of Outputs 24
Number of Product Terms 240
Number of Terminals 40 40
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
Organization 12 DEDICATED INPUTS, 24 I/O 12 DEDICATED INPUTS, 24 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY CERAMIC, GLASS-SEALED
Package Code DIP DIP
Package Equivalence Code DIP40,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Peak Reflow Temperature (Cel) 220
Programmable Logic Type OT PLD UV PLD
Propagation Delay 25 ns 18 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 4.826 mm
Supply Voltage-Max 5.25 V 5.25 V
Supply Voltage-Min 4.75 V 4.75 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Finish TIN LEAD TIN LEAD
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm
Base Number Matches 1 2
Pbfree Code No

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