EP20K60EFI324-2
vs
EP20K60EFC324-3N
feature comparison
| Rohs Code |
No
|
Yes
|
| Part Life Cycle Code |
Obsolete
|
Obsolete
|
| Ihs Manufacturer |
ALTERA CORP
|
INTEL CORP
|
| Part Package Code |
BGA
|
|
| Package Description |
BGA, BGA324,18X18,40
|
FINE LINE, BGA-324
|
| Pin Count |
324
|
|
| Reach Compliance Code |
unknown
|
compliant
|
| HTS Code |
8542.39.00.01
|
8542.39.00.01
|
| JESD-30 Code |
S-PBGA-B324
|
S-PBGA-B324
|
| JESD-609 Code |
e1
|
e1
|
| Length |
19 mm
|
19 mm
|
| Moisture Sensitivity Level |
3
|
3
|
| Number of Dedicated Inputs |
4
|
4
|
| Number of I/O Lines |
196
|
196
|
| Number of Inputs |
188
|
188
|
| Number of Logic Cells |
2560
|
2560
|
| Number of Outputs |
188
|
188
|
| Number of Terminals |
324
|
324
|
| Organization |
4 DEDICATED INPUTS, 196 I/O
|
4 DEDICATED INPUTS, 196 I/O
|
| Output Function |
MACROCELL
|
MACROCELL
|
| Package Body Material |
PLASTIC/EPOXY
|
PLASTIC/EPOXY
|
| Package Code |
BGA
|
BGA
|
| Package Equivalence Code |
BGA324,18X18,40
|
BGA324,18X18,40
|
| Package Shape |
SQUARE
|
SQUARE
|
| Package Style |
GRID ARRAY
|
GRID ARRAY
|
| Peak Reflow Temperature (Cel) |
220
|
|
| Programmable Logic Type |
LOADABLE PLD
|
LOADABLE PLD
|
| Propagation Delay |
2.41 ns
|
3.56 ns
|
| Qualification Status |
Not Qualified
|
Not Qualified
|
| Seated Height-Max |
3.5 mm
|
3.5 mm
|
| Supply Voltage-Max |
1.89 V
|
1.89 V
|
| Supply Voltage-Min |
1.71 V
|
1.71 V
|
| Supply Voltage-Nom |
1.8 V
|
1.8 V
|
| Surface Mount |
YES
|
YES
|
| Technology |
CMOS
|
CMOS
|
| Terminal Finish |
TIN SILVER COPPER
|
TIN SILVER COPPER
|
| Terminal Form |
BALL
|
BALL
|
| Terminal Pitch |
1 mm
|
1 mm
|
| Terminal Position |
BOTTOM
|
BOTTOM
|
| Width |
19 mm
|
19 mm
|
| Base Number Matches |
2
|
1
|
| Factory Lead Time |
|
4 Weeks
|
| Clock Frequency-Max |
|
160 MHz
|
| Operating Temperature-Max |
|
85 °C
|
| Operating Temperature-Min |
|
|
| Temperature Grade |
|
OTHER
|
|
|
|
Compare EP20K60EFI324-2 with alternatives
Compare EP20K60EFC324-3N with alternatives