EP20K200EFC672-3X vs EP20K200EFC672-1 feature comparison

EP20K200EFC672-3X Altera Corporation

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EP20K200EFC672-1 Altera Corporation

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Rohs Code No No
Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer ALTERA CORP ALTERA CORP
Part Package Code BGA BGA
Package Description BGA, FINE LINE, BGA-672
Pin Count 672 672
Reach Compliance Code compliant not_compliant
ECCN Code 3A991.D 3A991.D
HTS Code 8542.39.00.01 8542.39.00.01
Clock Frequency-Max 160 MHz 160 MHz
JESD-30 Code S-PBGA-B672 S-PBGA-B672
JESD-609 Code e1 e0
Length 27 mm 27 mm
Moisture Sensitivity Level 3 3
Number of Dedicated Inputs 4 4
Number of I/O Lines 376 376
Number of Terminals 672 672
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min
Organization 4 DEDICATED INPUTS, 376 I/O 4 DEDICATED INPUTS, 376 I/O
Output Function MACROCELL MACROCELL
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code BGA BGA
Package Equivalence Code BGA672,26X26,40 BGA672,26X26,40
Package Shape SQUARE SQUARE
Package Style GRID ARRAY GRID ARRAY
Peak Reflow Temperature (Cel) 220 220
Programmable Logic Type LOADABLE PLD LOADABLE PLD
Propagation Delay 2.33 ns 1.58 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 3.5 mm 3.5 mm
Supply Voltage-Max 1.89 V 1.89 V
Supply Voltage-Min 1.71 V 1.71 V
Supply Voltage-Nom 1.8 V 1.8 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade OTHER OTHER
Terminal Finish TIN SILVER COPPER TIN LEAD
Terminal Form BALL BALL
Terminal Pitch 1 mm 1 mm
Terminal Position BOTTOM BOTTOM
Width 27 mm 27 mm
Base Number Matches 1 2
Pbfree Code No
Number of Inputs 368
Number of Logic Cells 8320
Number of Outputs 368
Time@Peak Reflow Temperature-Max (s) 20

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