EFM32TG11B520F128IM64-A
vs
EFM32TG11B520F128IM64-B
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Obsolete
Active
Ihs Manufacturer
SILICON LABORATORIES INC
SILICON LABORATORIES INC
Reach Compliance Code
compliant
compliant
HTS Code
8542.31.00.01
8542.31.00.01
Date Of Intro
2018-02-12
2018-11-14
uPs/uCs/Peripheral ICs Type
MICROCONTROLLER
MICROCONTROLLER, RISC
Base Number Matches
2
2
Package Description
QFN-64
ECCN Code
3A991.A.2
Has ADC
YES
Address Bus Width
Bit Size
32
Boundary Scan
YES
CPU Family
Cortex-M0+
Clock Frequency-Max
48 MHz
DAC Channels
YES
DMA Channels
YES
External Data Bus Width
Format
FIXED POINT
Integrated Cache
NO
JESD-30 Code
S-PQCC-N64
JESD-609 Code
e3
Length
9 mm
Low Power Mode
YES
Moisture Sensitivity Level
3
Number of DMA Channels
8
Number of I/O Lines
53
Number of Serial I/Os
5
Number of Terminals
64
Number of Timers
4
On Chip Data RAM Width
8
On Chip Program ROM Width
8
Operating Temperature-Max
125 °C
Operating Temperature-Min
-40 °C
PWM Channels
YES
Package Body Material
PLASTIC/EPOXY
Package Code
HVQCCN
Package Equivalence Code
LCC64,.35SQ,20
Package Shape
SQUARE
Package Style
CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Peak Reflow Temperature (Cel)
260
RAM (bytes)
32768
ROM (words)
131072
ROM Programmability
FLASH
Seated Height-Max
0.8 mm
Speed
48 MHz
Supply Voltage-Max
3.8 V
Supply Voltage-Min
1.8 V
Supply Voltage-Nom
3.3 V
Surface Mount
YES
Technology
CMOS
Terminal Finish
MATTE TIN
Terminal Form
NO LEAD
Terminal Pitch
0.5 mm
Terminal Position
QUAD
Time@Peak Reflow Temperature-Max (s)
40
Width
9 mm