DV74LS181N vs 54LS181DMQB feature comparison

DV74LS181N avg Semiconductors

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54LS181DMQB Fairchild Semiconductor Corporation

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer AVG SEMICONDUCTORS FAIRCHILD SEMICONDUCTOR CORP
Part Package Code DIP
Package Description DIP, DIP, DIP24,.6
Pin Count 24
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LS
JESD-30 Code R-PDIP-T24 R-XDIP-T24
Length 31.815 mm
Logic IC Type ARITHMETIC LOGIC UNIT ARITHMETIC LOGIC UNIT
Number of Bits 4
Number of Functions 1
Number of Terminals 24 24
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -10 °C -55 °C
Package Body Material PLASTIC/EPOXY CERAMIC
Package Code DIP DIP
Package Equivalence Code DIP24,.6 DIP24,.6
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Propagation Delay (tpd) 62 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 5.21 mm
Supply Voltage-Max (Vsup) 5.5 V
Supply Voltage-Min (Vsup) 4.5 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology TTL TTL
Temperature Grade COMMERCIAL MILITARY
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Width 15.24 mm
Base Number Matches 1 3
Rohs Code No
JESD-609 Code e0
Screening Level 38535Q/M;38534H;883B
Terminal Finish Tin/Lead (Sn/Pb)

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