DS1000M-60
vs
DS1004M-005
feature comparison
All Stats
Differences Only
Rohs Code
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
DALLAS SEMICONDUCTOR
DALLAS SEMICONDUCTOR
Package Description
0.300 INCH, DIP-8
Reach Compliance Code
unknown
unknown
Additional Feature
BOTH LEADING & TRAILING EDGE ACCURACY; MAX FAN OUT OF 10 74LS LOAD PER OUTPUT
INPUT TO 1ST TAP DELAY TOL. = 1.5NS; BOTH LEADING & TRAILING EDGE ACCURACY
Family
CMOS/TTL
CMOS/TTL
JESD-30 Code
R-PDIP-T8
R-PDIP-T8
JESD-609 Code
e0
Logic IC Type
SILICON DELAY LINE
SILICON DELAY LINE
Number of Functions
1
1
Number of Taps/Steps
5
5
Number of Terminals
8
8
Operating Temperature-Max
70 °C
70 °C
Operating Temperature-Min
Output Polarity
TRUE
TRUE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
DIP
DIP
Package Equivalence Code
DIP8,.3
DIP8(UNSPEC)
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
IN-LINE
IN-LINE
Power Supply Current-Max (ICC)
75 mA
Programmable Delay Line
NO
NO
Prop. Delay@Nom-Sup
60 ns
Qualification Status
Not Qualified
Not Qualified
Supply Voltage-Max (Vsup)
5.25 V
5.25 V
Supply Voltage-Min (Vsup)
4.75 V
4.75 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
NO
NO
Technology
CMOS
CMOS
Temperature Grade
COMMERCIAL
COMMERCIAL
Terminal Finish
TIN LEAD
Terminal Form
THROUGH-HOLE
THROUGH-HOLE
Terminal Pitch
2.54 mm
Terminal Position
DUAL
DUAL
Total Delay-Nom (td)
60 ns
25 ns
Base Number Matches
2
1
Load Capacitance (CL)
15 pF
Compare DS1000M-60 with alternatives
Compare DS1004M-005 with alternatives