D80C51UXXX-36 vs D80C51UFXXX-36 feature comparison

D80C51UXXX-36 Matra MHS

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D80C51UFXXX-36 Matra MHS

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Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer MATRA MHS MATRA MHS
Reach Compliance Code unknown unknown
ECCN Code 3A991.A.2 3A991.A.2
HTS Code 8542.31.00.01 8542.31.00.01
Has ADC NO NO
Additional Feature BOOLEAN PROCESSOR BOOLEAN PROCESSOR; ROM PROTECT
Address Bus Width 16 16
Bit Size 8 8
Boundary Scan NO NO
Clock Frequency-Max 36 MHz 36 MHz
DAC Channels NO NO
DMA Channels NO NO
External Data Bus Width 8 8
Format FIXED POINT FIXED POINT
Integrated Cache NO NO
JESD-30 Code R-GDIP-T40 R-GDIP-T40
Low Power Mode YES YES
Number of DMA Channels
Number of External Interrupts 2 2
Number of I/O Lines 32 32
Number of Serial I/Os 1 1
Number of Terminals 40 40
Number of Timers 2 2
On Chip Data RAM Width 8 8
On Chip Program ROM Width 8 8
Operating Temperature-Max 70 °C 70 °C
Operating Temperature-Min
PWM Channels NO NO
Package Body Material CERAMIC, GLASS-SEALED CERAMIC, GLASS-SEALED
Package Code DIP DIP
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Qualification Status Not Qualified Not Qualified
RAM (words) 128 128
ROM (words) 4096 4096
ROM Programmability MROM MROM
Speed 36 MHz 36 MHz
Supply Current-Max 54 mA 54 mA
Supply Voltage-Max 5.5 V 5.5 V
Supply Voltage-Min 5 V 5 V
Supply Voltage-Nom 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade COMMERCIAL COMMERCIAL
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Position DUAL DUAL
uPs/uCs/Peripheral ICs Type MICROCONTROLLER MICROCONTROLLER
Base Number Matches 1 1

Compare D80C51UXXX-36 with alternatives

Compare D80C51UFXXX-36 with alternatives