CY74FCT16240ATPACT
vs
IDT74FCT16240ATPA8
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
CYPRESS SEMICONDUCTOR CORP
INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code
TSSOP
TSSOP
Package Description
0.240 INCH, TSSOP-48
TSSOP, TSSOP48,.3,20
Pin Count
48
48
Reach Compliance Code
unknown
not_compliant
HTS Code
8542.39.00.01
8542.39.00.01
Family
FCT
FCT
JESD-30 Code
R-PDSO-G48
R-PDSO-G48
Length
12.5 mm
12.5 mm
Load Capacitance (CL)
50 pF
50 pF
Logic IC Type
BUS DRIVER
BUS DRIVER
Number of Bits
4
4
Number of Functions
4
4
Number of Ports
2
2
Number of Terminals
48
48
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
-40 °C
-40 °C
Output Characteristics
3-STATE
3-STATE
Output Polarity
INVERTED
INVERTED
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
TSSOP
TSSOP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd)
4.8 ns
4.8 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
1.1 mm
1.2 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
4.5 V
4.5 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
INDUSTRIAL
Terminal Form
GULL WING
GULL WING
Terminal Pitch
0.5 mm
0.5 mm
Terminal Position
DUAL
DUAL
Width
6.1 mm
6.1 mm
Base Number Matches
2
1
Rohs Code
Additional Feature
POWER OFF DISABLE O/PS; IOH MAX DURATION < 1S; MAX OUTPUT SKEW = 0.5NS
Control Type
ENABLE LOW
JESD-609 Code
e0
Max I(ol)
0.064 A
Moisture Sensitivity Level
1
Package Equivalence Code
TSSOP48,.3,20
Packing Method
TR
Peak Reflow Temperature (Cel)
240
Prop. Delay@Nom-Sup
4.8 ns
Terminal Finish
TIN LEAD
Time@Peak Reflow Temperature-Max (s)
20
Compare CY74FCT16240ATPACT with alternatives
Compare IDT74FCT16240ATPA8 with alternatives