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CMM5114D3Z vs CDM5114CD3 feature comparison

CMM5114D3Z Harris Semiconductor

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CDM5114CD3 Intersil Corporation

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Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer HARRIS SEMICONDUCTOR INTERSIL CORP
Package Description DIP, DIP18,.3 DIP-18
Reach Compliance Code unknown not_compliant
ECCN Code 3A001.A.2.C 3A001.A.2.C
HTS Code 8542.32.00.41 8542.32.00.41
I/O Type COMMON COMMON
JESD-30 Code R-XDIP-T18 R-XDIP-T18
JESD-609 Code e0 e0
Memory Density 4096 bit 4096 bit
Memory IC Type STANDARD SRAM STANDARD SRAM
Memory Width 4 4
Number of Terminals 18 18
Number of Words 1024 words 1024 words
Number of Words Code 1000 1000
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 1KX4 1KX4
Output Characteristics 3-STATE 3-STATE
Package Body Material CERAMIC CERAMIC
Package Code DIP DIP
Package Equivalence Code DIP18,.3 DIP18,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL PARALLEL
Qualification Status Not Qualified Not Qualified
Screening Level MIL-STD-883 Class B (Modified) MIL-STD-883 Class B (Modified)
Supply Current-Max 0.006 mA
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Finish Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Total Dose 100k Rad(Si) V
Base Number Matches 2 2
Access Time-Max 250 ns
Standby Current-Max 0.0005 A
Standby Voltage-Min 2 V
Memory » SRAMs
Memory » SRAMs

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