CDP1824CD3 vs CDP1824CD3 feature comparison

CDP1824CD3 Intersil Corporation

Buy Now Datasheet

CDP1824CD3 Harris Semiconductor

Buy Now Datasheet
Rohs Code No No
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer INTERSIL CORP HARRIS SEMICONDUCTOR
Part Package Code DIP
Package Description SIDE BRAZED, CERAMIC, DIP-18 DIP, DIP18,.3
Pin Count 18
Reach Compliance Code not_compliant unknown
ECCN Code 3A001.A.2.C 3A001.A.2.C
HTS Code 8542.32.00.41 8542.32.00.41
Access Time-Max 825 ns 825 ns
JESD-30 Code R-CDIP-T18 R-CDIP-T18
JESD-609 Code e0 e0
Memory Density 256 bit 256 bit
Memory IC Type STANDARD SRAM STANDARD SRAM
Memory Width 8 8
Number of Functions 1 1
Number of Ports 1 1
Number of Terminals 18 18
Number of Words 32 words 32 words
Number of Words Code 32 32
Operating Mode ASYNCHRONOUS ASYNCHRONOUS
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -55 °C -55 °C
Organization 32X8 32X8
Output Characteristics 3-STATE 3-STATE
Output Enable NO NO
Package Body Material CERAMIC, METAL-SEALED COFIRED CERAMIC, METAL-SEALED COFIRED
Package Code DIP DIP
Package Equivalence Code DIP18,.3 DIP18,.3
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE IN-LINE
Parallel/Serial PARALLEL PARALLEL
Qualification Status Not Qualified Not Qualified
Screening Level 38535Q/M;38534H;883B 38535Q/M;38534H;883B
Standby Current-Max 0.00004 A 0.00004 A
Standby Voltage-Min 2.5 V 2.5 V
Supply Current-Max 0.008 mA 0.008 mA
Supply Voltage-Max (Vsup) 6.5 V 6.5 V
Supply Voltage-Min (Vsup) 4 V 4 V
Supply Voltage-Nom (Vsup) 5 V 5 V
Surface Mount NO NO
Technology CMOS CMOS
Temperature Grade MILITARY MILITARY
Terminal Finish Tin/Lead (Sn/Pb) Tin/Lead (Sn/Pb)
Terminal Form THROUGH-HOLE THROUGH-HOLE
Terminal Pitch 2.54 mm 2.54 mm
Terminal Position DUAL DUAL
Base Number Matches 1 1