CD74FCT543TQM96
vs
IDT74FCT543TSO
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Obsolete
Ihs Manufacturer
HARRIS SEMICONDUCTOR
INTEGRATED DEVICE TECHNOLOGY INC
Package Description
,
SOP, SOP24,.3
Reach Compliance Code
unknown
not_compliant
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION; MASTER CONTROL FOR LATCH
Family
FCT
FCT
JESD-30 Code
R-PDSO-G24
R-PDSO-G24
Load Capacitance (CL)
50 pF
50 pF
Logic IC Type
REGISTERED BUS TRANSCEIVER
REGISTERED BUS TRANSCEIVER
Number of Bits
8
8
Number of Functions
1
1
Number of Ports
2
2
Number of Terminals
24
24
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
-40 °C
-40 °C
Output Characteristics
3-STATE
3-STATE
Output Polarity
TRUE
TRUE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
SOP
SOP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE
SMALL OUTLINE
Propagation Delay (tpd)
12.5 ns
12.5 ns
Qualification Status
Not Qualified
Not Qualified
Supply Voltage-Max (Vsup)
5.25 V
5.25 V
Supply Voltage-Min (Vsup)
4.75 V
4.75 V
Supply Voltage-Nom (Vsup)
5 V
5 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
INDUSTRIAL
INDUSTRIAL
Terminal Form
GULL WING
GULL WING
Terminal Position
DUAL
DUAL
Base Number Matches
2
1
Rohs Code
Part Package Code
SOIC
Pin Count
24
Control Type
INDEPENDENT CONTROL
Count Direction
BIDIRECTIONAL
JESD-609 Code
e0
Length
15.4 mm
Max I(ol)
0.064 A
Moisture Sensitivity Level
1
Package Equivalence Code
SOP24,.3
Peak Reflow Temperature (Cel)
225
Prop. Delay@Nom-Sup
8.5 ns
Seated Height-Max
2.65 mm
Terminal Finish
TIN LEAD
Terminal Pitch
1.27 mm
Time@Peak Reflow Temperature-Max (s)
30
Width
7.5 mm
Compare CD74FCT543TQM96 with alternatives
Compare IDT74FCT543TSO with alternatives