935174100112 vs 74LV00PW,698 feature comparison

935174100112 Nexperia

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74LV00PW,698 NXP Semiconductors

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer NEXPERIA NXP SEMICONDUCTORS
Package Description TSSOP, TSSOP, TSSOP14,.25
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01
Family LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14 R-PDSO-G14
JESD-609 Code e4 e4
Length 5 mm 5 mm
Logic IC Type NAND GATE NAND GATE
Moisture Sensitivity Level 1 1
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260 260
Propagation Delay (tpd) 31 ns 31 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.1 mm 1.1 mm
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 1 V 1 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au) NICKEL PALLADIUM GOLD
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 30 30
Width 4.4 mm 4.4 mm
Base Number Matches 2 2
Part Package Code TSSOP
Pin Count 14
Manufacturer Package Code SOT402-1
Load Capacitance (CL) 50 pF
Max I(ol) 0.006 A
Package Equivalence Code TSSOP14,.25
Packing Method TUBE
Prop. Delay@Nom-Sup 18 ns
Schmitt Trigger NO

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Compare 74LV00PW,698 with alternatives