74LVT2952PWDH
vs
74LVT2952PW-T
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Transferred
Ihs Manufacturer
NXP SEMICONDUCTORS
PHILIPS SEMICONDUCTORS
Package Description
TSSOP,
TSSOP, TSSOP24,.25
Reach Compliance Code
unknown
unknown
HTS Code
8542.39.00.01
8542.39.00.01
Additional Feature
WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Family
LVT
JESD-30 Code
R-PDSO-G24
R-PDSO-G24
Length
7.8 mm
Load Capacitance (CL)
50 pF
Logic IC Type
REGISTERED BUS TRANSCEIVER
REGISTERED BUS TRANSCEIVER
Number of Bits
8
8
Number of Functions
1
1
Number of Ports
2
2
Number of Terminals
24
24
Operating Temperature-Max
85 °C
85 °C
Operating Temperature-Min
-40 °C
-40 °C
Output Characteristics
3-STATE
3-STATE
Output Polarity
TRUE
TRUE
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
TSSOP
TSSOP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Power Supply Current-Max (ICC)
12 mA
Propagation Delay (tpd)
6.9 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
1.1 mm
Supply Voltage-Max (Vsup)
3.6 V
Supply Voltage-Min (Vsup)
2.7 V
Supply Voltage-Nom (Vsup)
3.3 V
3.3 V
Surface Mount
YES
YES
Technology
BICMOS
CMOS
Temperature Grade
INDUSTRIAL
INDUSTRIAL
Terminal Form
GULL WING
GULL WING
Terminal Pitch
0.65 mm
0.635 mm
Terminal Position
DUAL
DUAL
Width
4.4 mm
Base Number Matches
1
2
Rohs Code
Control Type
INDEPENDENT CONTROL
Count Direction
BIDIRECTIONAL
JESD-609 Code
e0
Max I(ol)
0.032 A
Package Equivalence Code
TSSOP24,.25
Packing Method
TR
Prop. Delay@Nom-Sup
6.1 ns
Terminal Finish
Tin/Lead (Sn/Pb)
Trigger Type
POSITIVE EDGE
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