74LVT244APW/T3 vs 74LVT244APW feature comparison

74LVT244APW/T3 Nexperia

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74LVT244APW Philips Semiconductors

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer NEXPERIA PHILIPS SEMICONDUCTORS
Package Description TSSOP,
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 2017-02-01
Family LVT LVT
JESD-30 Code R-PDSO-G20 R-PDSO-G20
JESD-609 Code e4
Length 6.5 mm
Logic IC Type BUS DRIVER BUS DRIVER
Moisture Sensitivity Level 1
Number of Bits 4 4
Number of Functions 2 2
Number of Ports 2 2
Number of Terminals 20 20
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity TRUE TRUE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260 260
Propagation Delay (tpd) 5.1 ns
Seated Height-Max 1.1 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2.7 V 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology BICMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Finish NICKEL PALLADIUM GOLD
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.635 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 4.4 mm
Base Number Matches 2 3
Control Type ENABLE LOW
Max I(ol) 0.032 A
Package Equivalence Code TSSOP20,.25
Prop. Delay@Nom-Sup 4.1 ns
Qualification Status Not Qualified

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