74LVT16500MEA vs 74LVT16500ADL,512 feature comparison

74LVT16500MEA Fairchild Semiconductor Corporation

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74LVT16500ADL,512 Nexperia

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Part Life Cycle Code Transferred Active
Ihs Manufacturer FAIRCHILD SEMICONDUCTOR CORP NEXPERIA
Package Description , SSOP,
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Base Number Matches 2 2
Rohs Code Yes
Date Of Intro 2017-02-01
Additional Feature WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Family LVT
JESD-30 Code R-PDSO-G56
Length 18.425 mm
Logic IC Type REGISTERED BUS TRANSCEIVER
Number of Bits 18
Number of Functions 1
Number of Ports 2
Number of Terminals 56
Operating Temperature-Max 85 °C
Operating Temperature-Min -40 °C
Output Characteristics 3-STATE
Output Polarity TRUE
Package Body Material PLASTIC/EPOXY
Package Code SSOP
Package Shape RECTANGULAR
Package Style SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 6.4 ns
Seated Height-Max 2.8 mm
Supply Voltage-Max (Vsup) 3.6 V
Supply Voltage-Min (Vsup) 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V
Surface Mount YES
Technology BICMOS
Temperature Grade INDUSTRIAL
Terminal Form GULL WING
Terminal Pitch 0.635 mm
Terminal Position DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.5 mm

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