74LVT16500ADL-T vs 74LVTH16500MEAX feature comparison

74LVT16500ADL-T Nexperia

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74LVTH16500MEAX Fairchild Semiconductor Corporation

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer NEXPERIA FAIRCHILD SEMICONDUCTOR CORP
Package Description SSOP, SSOP, SSOP56,.4
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 2017-02-01
Additional Feature WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION
Family LVT LVT
JESD-30 Code R-PDSO-G56 R-PDSO-G56
Length 18.425 mm 18.415 mm
Logic IC Type REGISTERED BUS TRANSCEIVER REGISTERED BUS TRANSCEIVER
Number of Bits 18 18
Number of Functions 1 1
Number of Ports 2 2
Number of Terminals 56 56
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity TRUE TRUE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SSOP SSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Peak Reflow Temperature (Cel) NOT SPECIFIED
Propagation Delay (tpd) 6.4 ns 6.9 ns
Seated Height-Max 2.8 mm 2.74 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2.7 V 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology BICMOS BICMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 0.635 mm 0.635 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 7.5 mm 7.5 mm
Base Number Matches 3 2
Part Package Code SSOP
Pin Count 56
Control Type INDEPENDENT CONTROL
Count Direction BIDIRECTIONAL
JESD-609 Code e3
Max I(ol) 0.064 A
Moisture Sensitivity Level 2
Package Equivalence Code SSOP56,.4
Packing Method TR
Prop. Delay@Nom-Sup 5.2 ns
Qualification Status Not Qualified
Terminal Finish MATTE TIN
Trigger Type NEGATIVE EDGE

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