74LVCH16244DL-T vs 74LVC16244APVG8 feature comparison

74LVCH16244DL-T NXP Semiconductors

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74LVC16244APVG8 Integrated Device Technology Inc

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer NXP SEMICONDUCTORS INTEGRATED DEVICE TECHNOLOGY INC
Package Description SSOP, SSOP,
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G48 R-PDSO-G48
Length 15.875 mm 15.875 mm
Load Capacitance (CL) 50 pF
Logic IC Type BUS DRIVER BUS DRIVER
Number of Bits 4 4
Number of Functions 4 4
Number of Ports 2 2
Number of Terminals 48 48
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity TRUE TRUE
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SSOP SSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, SHRINK PITCH SMALL OUTLINE, SHRINK PITCH
Propagation Delay (tpd) 6 ns 4.7 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 2.8 mm 2.794 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 1.2 V 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 0.635 mm 0.635 mm
Terminal Position DUAL DUAL
Width 7.5 mm 7.493 mm
Base Number Matches 1 2
Pbfree Code Yes
Rohs Code Yes
Part Package Code SSOP
Pin Count 48
Manufacturer Package Code PVG48
ECCN Code EAR99
Date Of Intro 1998-10-01
Control Type ENABLE LOW
JESD-609 Code e3
Moisture Sensitivity Level 1
Peak Reflow Temperature (Cel) 260
Terminal Finish MATTE TIN
Time@Peak Reflow Temperature-Max (s) 30

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