74LVCH16240ADGG-T vs 74LCX16240MTD feature comparison

74LVCH16240ADGG-T NXP Semiconductors

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74LCX16240MTD Fairchild Semiconductor Corporation

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer NXP SEMICONDUCTORS FAIRCHILD SEMICONDUCTOR CORP
Package Description TSSOP, 6.10 MM, MO-153ED, TSSOP-48
Reach Compliance Code unknown compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G48 R-PDSO-G48
Length 12.5 mm 12.5 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type BUS DRIVER BUS DRIVER
Number of Bits 4 4
Number of Functions 4 4
Number of Ports 2 2
Number of Terminals 48 48
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Characteristics 3-STATE 3-STATE
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd) 6.2 ns 5.4 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.2 mm 1.2 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 1.2 V 2 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Form GULL WING GULL WING
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position DUAL DUAL
Width 6.1 mm 6.1 mm
Base Number Matches 1 4
Pbfree Code Yes
Rohs Code Yes
Part Package Code TSSOP
Pin Count 48
Manufacturer Package Code 48 LD,TSSOP,JEDEC MO-153, 6.1MM WIDE
ECCN Code EAR99
Control Type ENABLE LOW
JESD-609 Code e4
Max I(ol) 0.024 A
Moisture Sensitivity Level 2
Package Equivalence Code TSSOP48,.3,20
Packing Method RAIL
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 4.5 ns
Terminal Finish NICKEL PALLADIUM GOLD
Time@Peak Reflow Temperature-Max (s) 30

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