74LVC138PW vs 74LVC138APW feature comparison

74LVC138PW NXP Semiconductors

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74LVC138APW Philips Semiconductors

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Part Life Cycle Code Obsolete Transferred
Ihs Manufacturer NXP SEMICONDUCTORS PHILIPS SEMICONDUCTORS
Package Description TSSOP,
Reach Compliance Code unknown unknown
ECCN Code EAR99 EAR99
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 3 ENABLE INPUTS
Family LVC/LCX/Z
Input Conditioning STANDARD
JESD-30 Code R-PDSO-G16 R-PDSO-G16
Length 5 mm
Load Capacitance (CL) 50 pF
Logic IC Type 3-LINE TO 8-LINE DECODER 3-LINE TO 8-LINE DECODER
Number of Functions 1 1
Number of Terminals 16 16
Operating Temperature-Max 85 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Output Polarity INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd) 7.5 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.1 mm
Supply Voltage-Max (Vsup) 3.6 V
Supply Voltage-Min (Vsup) 1.2 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL AUTOMOTIVE
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.635 mm
Terminal Position DUAL DUAL
Width 4.4 mm
Base Number Matches 2 3
Rohs Code Yes
Max I(ol) 0.024 A
Package Equivalence Code TSSOP16,.25
Packing Method TUBE
Peak Reflow Temperature (Cel) 260
Prop. Delay@Nom-Sup 7.5 ns

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