74LVC109D-T vs IDT74LVC112ADC8 feature comparison

74LVC109D-T NXP Semiconductors

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IDT74LVC112ADC8 Integrated Device Technology Inc

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Rohs Code Yes
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer NXP SEMICONDUCTORS INTEGRATED DEVICE TECHNOLOGY INC
Part Package Code SOIC SOIC
Package Description SOP, SOP,
Pin Count 16 16
Reach Compliance Code unknown unknown
HTS Code 8542.39.00.01 8542.39.00.01
Family LVC/LCX/Z LVC/LCX/Z
JESD-30 Code R-PDSO-G16 R-PDSO-G16
JESD-609 Code e4 e0
Length 9.9 mm 9.9 mm
Load Capacitance (CL) 50 pF
Logic IC Type J-KBAR FLIP-FLOP J-K FLIP-FLOP
Moisture Sensitivity Level 1
Number of Bits 2 2
Number of Functions 2 2
Number of Terminals 16 16
Operating Temperature-Max 85 °C 85 °C
Operating Temperature-Min -40 °C -40 °C
Output Polarity COMPLEMENTARY COMPLEMENTARY
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code SOP SOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE SMALL OUTLINE
Peak Reflow Temperature (Cel) NOT SPECIFIED
Propagation Delay (tpd) 7.5 ns 7.1 ns
Qualification Status Not Qualified Not Qualified
Seated Height-Max 1.75 mm 1.75 mm
Supply Voltage-Max (Vsup) 3.6 V 3.6 V
Supply Voltage-Min (Vsup) 2.7 V 2.7 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade INDUSTRIAL INDUSTRIAL
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au) TIN LEAD
Terminal Form GULL WING GULL WING
Terminal Pitch 1.27 mm 1.27 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Trigger Type POSITIVE EDGE NEGATIVE EDGE
Width 3.9 mm 3.9 mm
fmax-Min 225 MHz 150 MHz
Base Number Matches 1 1

Compare 74LVC109D-T with alternatives

Compare IDT74LVC112ADC8 with alternatives