74LV86PW
vs
74LV86PW
feature comparison
All Stats
Differences Only
Pbfree Code
Yes
Rohs Code
Yes
Yes
Part Life Cycle Code
Transferred
Obsolete
Ihs Manufacturer
NXP SEMICONDUCTORS
NEXPERIA
Part Package Code
TSSOP
Package Description
TSSOP, TSSOP14,.25
TSSOP,
Pin Count
14
Reach Compliance Code
compliant
compliant
HTS Code
8542.39.00.01
8542.39.00.01
Family
LV/LV-A/LVX/H
LV/LV-A/LVX/H
JESD-30 Code
R-PDSO-G14
R-PDSO-G14
JESD-609 Code
e4
e4
Length
5 mm
5 mm
Load Capacitance (CL)
50 pF
Logic IC Type
XOR GATE
XOR GATE
Max I(ol)
0.006 A
Moisture Sensitivity Level
1
1
Number of Functions
4
4
Number of Inputs
2
2
Number of Terminals
14
14
Operating Temperature-Max
125 °C
125 °C
Operating Temperature-Min
-40 °C
-40 °C
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
TSSOP
TSSOP
Package Equivalence Code
TSSOP14,.25
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel)
260
260
Prop. Delay@Nom-Sup
24 ns
Propagation Delay (tpd)
41 ns
41 ns
Qualification Status
Not Qualified
Schmitt Trigger
NO
Seated Height-Max
1.1 mm
1.1 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
1 V
1 V
Supply Voltage-Nom (Vsup)
3.3 V
3.3 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
AUTOMOTIVE
AUTOMOTIVE
Terminal Finish
Nickel/Palladium/Gold (Ni/Pd/Au)
NICKEL PALLADIUM GOLD
Terminal Form
GULL WING
GULL WING
Terminal Pitch
0.65 mm
0.65 mm
Terminal Position
DUAL
DUAL
Time@Peak Reflow Temperature-Max (s)
30
30
Width
4.4 mm
4.4 mm
Base Number Matches
10
4
Date Of Intro
2017-02-01
Compare 74LV86PW with alternatives
Compare 74LV86PW with alternatives