74LV138PWDH-T
vs
HD74LV138ATELL
feature comparison
All Stats
Differences Only
Part Life Cycle Code
Obsolete
Active
Ihs Manufacturer
NXP SEMICONDUCTORS
RENESAS ELECTRONICS CORP
Package Description
TSSOP,
TSSOP, TSSOP16,.25
Reach Compliance Code
unknown
compliant
ECCN Code
EAR99
EAR99
HTS Code
8542.39.00.01
8542.39.00.01
Family
LV/LV-A/LVX/H
LV/LV-A/LVX/H
Input Conditioning
STANDARD
STANDARD
JESD-30 Code
R-PDSO-G16
R-PDSO-G16
Length
5 mm
5 mm
Load Capacitance (CL)
50 pF
50 pF
Logic IC Type
3-LINE TO 8-LINE DECODER
3-LINE TO 8-LINE DECODER
Number of Functions
1
1
Number of Terminals
16
16
Operating Temperature-Max
125 °C
85 °C
Operating Temperature-Min
-40 °C
-40 °C
Output Polarity
INVERTED
INVERTED
Package Body Material
PLASTIC/EPOXY
PLASTIC/EPOXY
Package Code
TSSOP
TSSOP
Package Shape
RECTANGULAR
RECTANGULAR
Package Style
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd)
55 ns
25 ns
Qualification Status
Not Qualified
Not Qualified
Seated Height-Max
1.1 mm
1.1 mm
Supply Voltage-Max (Vsup)
5.5 V
5.5 V
Supply Voltage-Min (Vsup)
1 V
2 V
Supply Voltage-Nom (Vsup)
3.3 V
2.5 V
Surface Mount
YES
YES
Technology
CMOS
CMOS
Temperature Grade
AUTOMOTIVE
INDUSTRIAL
Terminal Form
GULL WING
GULL WING
Terminal Pitch
0.65 mm
0.65 mm
Terminal Position
DUAL
DUAL
Width
4.4 mm
4.4 mm
Base Number Matches
1
1
Pbfree Code
No
Rohs Code
No
Part Package Code
TSSOP
Pin Count
16
JESD-609 Code
e0
Max I(ol)
0.006 A
Package Equivalence Code
TSSOP16,.25
Packing Method
TR
Prop. Delay@Nom-Sup
18 ns
Terminal Finish
TIN LEAD
Compare 74LV138PWDH-T with alternatives
Compare HD74LV138ATELL with alternatives