74LV132PW-T vs 74LVX132TTR feature comparison

74LV132PW-T Nexperia

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74LVX132TTR STMicroelectronics

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Rohs Code Yes Yes
Part Life Cycle Code Obsolete Obsolete
Ihs Manufacturer NEXPERIA STMICROELECTRONICS
Package Description TSSOP, TSSOP-14-A1.2
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 2017-02-01
Family LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14 R-PDSO-G14
JESD-609 Code e4 e3/e4
Length 5 mm 5 mm
Logic IC Type NAND GATE NAND GATE
Moisture Sensitivity Level 1
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -55 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 43 ns 13.5 ns
Seated Height-Max 1.1 mm 1.2 mm
Supply Voltage-Max (Vsup) 5.5 V 3.6 V
Supply Voltage-Min (Vsup) 1 V 2 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE MILITARY
Terminal Finish NICKEL PALLADIUM GOLD MATTE TIN/NICKEL PALLADIUM GOLD
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 4.4 mm 4.4 mm
Base Number Matches 1 1
Part Package Code TSSOP
Pin Count 14
Load Capacitance (CL) 50 pF
Max I(ol) 0.004 A
Package Equivalence Code TSSOP14,.25
Packing Method TR
Prop. Delay@Nom-Sup 10 ns
Qualification Status Not Qualified
Schmitt Trigger YES

Compare 74LV132PW-T with alternatives

Compare 74LVX132TTR with alternatives