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74LV132BQ,115 vs 74LVC06ABQ,115 feature comparison

74LV132BQ,115 NXP Semiconductors

Buy Now Datasheet

74LVC06ABQ,115 NXP Semiconductors

Buy Now Datasheet
Rohs Code Yes Yes
Part Life Cycle Code Transferred Transferred
Ihs Manufacturer NXP SEMICONDUCTORS NXP SEMICONDUCTORS
Part Package Code QFN QFN
Package Description 2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT762-1, DHVQFN-14 2.50 X 3 MM, 0.85 MM HEIGHT, PLASTIC, MO-241, SOT-762-1, DHVQFN-14
Pin Count 14 14
Manufacturer Package Code SOT762-1 SOT762-1
Reach Compliance Code compliant compliant
HTS Code 8542.39.00.01 8542.39.00.01
Family LV/LV-A/LVX/H LVC/LCX/Z
JESD-30 Code R-PQCC-N14 R-PQCC-N14
JESD-609 Code e4 e4
Length 3 mm 3 mm
Load Capacitance (CL) 50 pF 50 pF
Logic IC Type NAND GATE INVERTER
Max I(ol) 0.006 A 0.024 A
Moisture Sensitivity Level 1 1
Number of Functions 4 6
Number of Inputs 2 1
Number of Terminals 14 14
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code HVQCCN HVQCCN
Package Equivalence Code LCC14,.1X.12,20 LCC14,.1X.12,20
Package Shape RECTANGULAR RECTANGULAR
Package Style CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
Packing Method TR TR
Peak Reflow Temperature (Cel) 260 260
Prop. Delay@Nom-Sup 25 ns 5 ns
Propagation Delay (tpd) 43 ns 5 ns
Qualification Status Not Qualified Not Qualified
Schmitt Trigger YES NO
Seated Height-Max 1 mm 1 mm
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 1 V 1.65 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au) Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Form NO LEAD NO LEAD
Terminal Pitch 0.5 mm 0.5 mm
Terminal Position QUAD QUAD
Time@Peak Reflow Temperature-Max (s) 30 30
Width 2.5 mm 2.5 mm
Base Number Matches 2 2
Output Characteristics OPEN-DRAIN
Logic » Gates
Logic » Gates

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