74LV00PW vs N74LV00PW feature comparison

74LV00PW Nexperia

Buy Now Datasheet

N74LV00PW NXP Semiconductors

Buy Now Datasheet
Rohs Code Yes
Part Life Cycle Code Active Obsolete
Ihs Manufacturer NEXPERIA NXP SEMICONDUCTORS
Package Description TSSOP, TSSOP,
Reach Compliance Code compliant unknown
HTS Code 8542.39.00.01 8542.39.00.01
Date Of Intro 1992-08-01
Family LV/LV-A/LVX/H LV/LV-A/LVX/H
JESD-30 Code R-PDSO-G14 R-PDSO-G14
JESD-609 Code e4
Length 5 mm 5 mm
Logic IC Type NAND GATE NAND GATE
Moisture Sensitivity Level 1
Number of Functions 4 4
Number of Inputs 2 2
Number of Terminals 14 14
Operating Temperature-Max 125 °C 125 °C
Operating Temperature-Min -40 °C -40 °C
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code TSSOP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Cel) 260
Propagation Delay (tpd) 31 ns 18 ns
Seated Height-Max 1.1 mm 1.1 mm
Supply Voltage-Max (Vsup) 5.5 V 5.5 V
Supply Voltage-Min (Vsup) 1 V 1 V
Supply Voltage-Nom (Vsup) 3.3 V 3.3 V
Surface Mount YES YES
Technology CMOS CMOS
Temperature Grade AUTOMOTIVE AUTOMOTIVE
Terminal Finish NICKEL PALLADIUM GOLD
Terminal Form GULL WING GULL WING
Terminal Pitch 0.65 mm 0.65 mm
Terminal Position DUAL DUAL
Time@Peak Reflow Temperature-Max (s) 30
Width 4.4 mm 4.4 mm
Base Number Matches 3 1
Load Capacitance (CL) 50 pF
Qualification Status Not Qualified

Compare 74LV00PW with alternatives

Compare N74LV00PW with alternatives