74F138SPC vs SN74LVC138AQPWREP feature comparison

74F138SPC Fairchild Semiconductor Corporation

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SN74LVC138AQPWREP Texas Instruments

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Part Life Cycle Code Obsolete Active
Ihs Manufacturer FAIRCHILD SEMICONDUCTOR CORP TEXAS INSTRUMENTS INC
Part Package Code DIP TSSOP
Package Description DIP, TSSOP-16
Pin Count 16 16
Reach Compliance Code unknown compliant
ECCN Code EAR99 EAR99
HTS Code 8542.39.00.01 8542.39.00.01
Additional Feature 3 ENABLE INPUTS TWO ACTIVE-LOW AND ONE ACTIVE-HIGH ENABLE INPUTS
Family F/FAST LVC/LCX/Z
Input Conditioning STANDARD STANDARD
JESD-30 Code R-PDIP-T16 R-PDSO-G16
Logic IC Type 3-LINE TO 8-LINE DECODER 3-LINE TO 8-LINE DECODER
Number of Functions 1 1
Number of Terminals 16 16
Operating Temperature-Max 70 °C 125 °C
Operating Temperature-Min -40 °C
Output Polarity INVERTED INVERTED
Package Body Material PLASTIC/EPOXY PLASTIC/EPOXY
Package Code DIP TSSOP
Package Shape RECTANGULAR RECTANGULAR
Package Style IN-LINE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Propagation Delay (tpd) 9 ns 7.9 ns
Qualification Status Not Qualified Not Qualified
Supply Voltage-Max (Vsup) 5.25 V 3.6 V
Supply Voltage-Min (Vsup) 4.75 V 2 V
Supply Voltage-Nom (Vsup) 5 V 2.7 V
Surface Mount NO YES
Technology TTL CMOS
Temperature Grade COMMERCIAL AUTOMOTIVE
Terminal Form THROUGH-HOLE GULL WING
Terminal Position DUAL DUAL
Base Number Matches 1 1
Pbfree Code Yes
Rohs Code Yes
Samacsys Manufacturer Texas Instruments
JESD-609 Code e4
Length 5 mm
Load Capacitance (CL) 50 pF
Max I(ol) 0.024 A
Moisture Sensitivity Level 1
Number of Bits 8
Package Equivalence Code TSSOP16,.25
Packing Method TR
Peak Reflow Temperature (Cel) 260
Power Supply Current-Max (ICC) 0.01 mA
Prop. Delay@Nom-Sup 6.7 ns
Seated Height-Max 1.2 mm
Terminal Finish Nickel/Palladium/Gold (Ni/Pd/Au)
Terminal Pitch 0.65 mm
Time@Peak Reflow Temperature-Max (s) NOT SPECIFIED
Width 4.4 mm

Compare 74F138SPC with alternatives

Compare SN74LVC138AQPWREP with alternatives